M.C. Browne, J.V. Germani, K. Heeger, A.W. Myers, R.G.H. Robertson, T.D. Van Wechel and J.F. Wilkerson
The SNO neutral current electronics is designed to extract pulse information from the 3He proportional detectors in order to provide the necessary information required for SNO physics analysis. The information to be extracted consists of:
The extractable information is determined both by the physics of the ionization processes that take place within the detector, the selected detector operating parameters (gas mixture, pressure, anode wire diameter, detector radius), and special constraints of the SNO detector, in particular the minimization of radioactivity which has necessitated single ended readout of the counters. The need to acquire both the low-energy (700 keV) neutron induced events as well as the high-energy (5-8 MeV) alpha particle events requires an electronics system with both very low noise and large dynamic range. Extracting particle identification and position requires digitizing the pulse to record the information on the time development of the ionization. An overview of the electronic readout system follows.
Pulses generated in each detector string are first amplified by a current preamplifier. The output from the current preamplifier is then sent to both an energy measurement system and a digitization system. In the energy measurement system, a shaper discriminator circuit forms a trigger for the shaped pulse's sample and hold ADC. The sample and hold ADC allows one to make relatively fast, precise energy measurements. The digitization circuit consists of a fast discriminator, a logarithmic amplifier followed by delay cables, a multiplexer, and a digitizer unit. This circuit records the pulse time development information. In case of a burst of events (i.e. supernova), the digitizer system might not be able to keep up with the data rate, but the shaped pulse ADC and scaler would allow recording of pertinent information. High Voltage bias is provided by a single commercial HV supply.
Design, testing, and fabrication of the current preamplifier hybrid chip which is based on a Robertson design using an inverted cascode front end stage is complete. A number of prototype preamplifiers have been
constructed and tested. Construction of production preamplifier modules is now starting.
Development of the logarithmic amplifier stage is complete, several 8 channel NIM based units have been constructed for initial data taking.
Design of the shaper discriminator circuit, the fast discriminator, and the multiplexer circuits are also complete and prototype units have been constructed and tested.
At this stage essentially all R&D is complete and we are now concentrating on the design and fabrication of the production NCD electronics.