G.C. Harper and T.A. Trainor
A feedback regulation system has been developed at the University of Washington for the cathode high voltage power supply of the STAR TPC detector. The target software for a VME based Motorola microprocessor was developed using the Experimental Physics and Industrial Control System (EPICS)1 software package on a SUN SPARC workstation. EPICS is a slow-controls software development package which uses a variety of graphics based tools to produce user displays, databases, and alarm structures in a simple and straightforward manner.
Variation in the pressure or density of the gas in the detector will produce undesirable variations in the electron drift speed. The feedback control scheme uses the drift speed of the electrons in the TPC as the controlled variable. Electrons are freed from the cathode surface by a short laser burst. The laser trigger signal is used as the start pulse for a LeCroy 1176 TDC. The stop pulse for the TDC is produced by a hit signal from one or more of the pad detectors of the TPC. The time delay between the two pulses is compared to a setpoint and an error signal is generated. The error signal is amplified by a gain element composed of a single sum-of-first-differences algorithm. The behavior of this algorithm, for simulations in which the drift speed is arbitrarily set equal to 1 µsec/kV, is effectively the same as a single time constant integrator with 9 dB/decade gain and a 0 dB crossing at 0.046 Hz. The amplified error signal is added to the quiescent setpoint for a Glassman 100 kV 6 mA high voltage power supply. The high voltage power supply is connected to the TPC cathode and its potential corrects the drift speed of the electrons as required.
Provisions are also made in the target software for a variety of interlock and safe start conditions. There are three conditions that must be met for operation of the high voltage power supply to proceed. The gas in the TPC must be at a satisfactory pressure, any personnel barrier must be secured, and the supply current must be below a prescribed level. Any failure of these conditions will turn off the high voltage, set the power supply to zero, open the feedback control loop, and alert the user with a large, red warning message on the display screen. The interlock conditions all have software latches so that the operator must take action before the system will restart.
The gain element is dynamically adjustable from the display. The correction signal is decomposed into high and low frequency components and the corner frequency for the decomposition is also dynamically adjustable from the display. A sinusoidal noise source with 0.001 Hz to 0.02 Hz frequency range and 0 to 0.5 µsec peak amplitude range is also available. All setpoints, control functions, and the interlock page are accessible from the display.
Interfacing between the VME crate and the power supply and hardware interlocks is through modules produced by the VMIC2 corporation. The system uses a 4 channel DAC, a 16 channel differential input ADC, a 16 channel binary output module using form C contact closures, and a 32 bit differential binary input module. The timing signal is produced by the LeCroy 1176 TDC mentioned above. An interface card built in-house distributes the signals from the VME modules to the power supply and interlocks.